He held various management and leadership positions on the AMD K5[5] and K7 processor teams.[6][7] He was vice president of the Advanced Architecture Labs, responsible for technology development in the areas of processor, multimedia, networking, telecommunications, and personal computer system products. He was vice president of the AMD Personal Connectivity Solutions Group in 2002.[8]
By 2004 he was a senior AMD fellow.[9]
Later he headed Texas Instruments' Austin Microprocessor Design Center.
He helped organize a 2005 conference on revitalizing computer architecture research.[10]
He served on the electrical engineering advisory council for Arizona State.[11]
Johnson wrote a seminal book on microprocessor superscalar architecture in 1991. The first book on the subject, it was an expanded version of his dissertation, and included an appendix on applying the techniques to the Intel Corporationx86 architecture.[5] He was quoted as saying: "The x86 really isn't all that complex—it just doesn't make a lot of sense."[5]
Selected works
Mike Johnson, Superscalar Microprocessor Design, Prentice-Hall, 1991, ISBN0-13-875634-1
William M. Johnson (June 1989). Super-Scalar Processor Design(PDF). Stanford University Computer Systems Laboratory. Technical Report No. CSL-TR-89-383
M. D. Smith; M. Johnson; M. Horowitz (April 1989). Limits on multiple instruction issue. 3rd International Conference on Architectural Support for Programming Languages and Operating Systems. Vol. 17. pp. 290–302. doi:10.1145/70082.68209. ISBN0-89791-300-0.
M. Johnson (February 26, 1990). RISC performance pushes back: A perspective on performance limits in general-purpose applications. Thirty-Fifth IEEE Computer Society International Conference (Compcon): Intellectual Leverage. Vol. 53. pp. 241–245. doi:10.1109/CMPCON.1990.63683. ISBN0-8186-2028-5.
Mike Johnson (November 1995). "RISC-like Design Fares Well for x86 CPUs". Microprocessor Report: 26–27.
D. Draper; M. Crowley; J. Holst; G. Favor; A. Schoy; J. Trull; A. Ben-Meir; R. Khanna; D. Wendell; R. Krishna; J. Nolan; D. Mallick; H. Partovi; M. Roberts; M. Johnson; T. Lee (November 1997). "Circuit techniques in a 266-MHz MMX-enabled processor". IEEE Journal of Solid-State Circuits. 32 (11): 1650–1664. Bibcode:1997IJSSC..32.1650D. doi:10.1109/4.641685. ISSN0018-9200.
^"Department of Electrical Engineering"(PDF). Arizona State University Ira A. Fulton School of Engineering. December 4, 2005. p. 2. Archived from the original(PDF) on October 8, 2011. Retrieved September 15, 2006.