Dean was elected as a member into the National Academy of Engineering in 2000 for innovative and pioneering contributions to personal computer development.
In 2000, Mark discussed a hand held device that would be able to display media content, like a digital newspaper.[5][6] In August 2011, Dean stated that he uses a tablet computer instead of a PC in his blog.[7][8]
Early life
Dean was born in Jefferson City, Tennessee. Dean displayed an affinity for technology and invention at a young age.[9] His father, James, worked bob electrical equipment for turbines and spillways. James would often bring Mark with him on work trips, introducing him to engineering.[10] When Mark was young, he and his dad constructed a tractor from scratch.[11] In middle school, Mark had made up his mind on becoming a computer engineer.[10] Dean attended Jefferson City High School in Tennessee, where he excelled in both academics and athletics.[9][12] While in high school, during the 1970s, Mark built his own personal computer.[5]
Mark graduated with a bachelors in electrical engineering during 1979.[20] Soon after, Mark got a job at IBM as an engineer.[5][20] His first task at the company was to create a word processor adapter for IBM's Datamaster terminal.[5] During this time, he also created the ISA bus that allowed additional components to be connected to a PC. His work got him promoted in 1982 to chief engineer of PC design, where he worked with a team to develop the IBM PC.[5] In the same year, Mark earned his master's degree in electrical engineering.[20] 17 years later, in 1999, Dean and his team developed a gigahertz microchip, the first in the world.
Dean was an IBM Vice President overseeing the company's Almaden Research Center in San Jose, California.[15] At one point, Mark was CTO for IBM Middle East and Africa.[21] He retired from the company in 2013 and became a professor at University of Tennessee.[20] Mark Dean is the John Fisher Distinguished Professor in the Department of Electrical Engineering and Computer Science at the University of Tennessee.[20][22]
Color video display system having programmable border color
4437092
March 13, 1984
Composite video color signal generation from digital color signals
4442428
April 10, 1984
Microcomputer system with bus control means for peripheral processing devices
4528626
July 9, 1985
Refresh generator system for a dynamic memory
4575826
March 11, 1986
Data processing system including a main processor and a co-processor and co-processor error handling logic
4598356
July 1, 1986
Computer system including a page mode memory with decreased access time and method of operation thereof
5034917
July 23, 1991
Method and apparatus for selectively posting write cycles using the 82385 cache controller
5045998
September 3, 1991
Bidirectional buffer with latch and parity capability
5107507
April 21, 1992
Control of pipelined operation in a microcomputer system employing dynamic bus sizing with 80386 processor and 82385 cache controller
5125084
June 23, 1992
System bus preempt for 80386 when running in an 80386/82385 microcomputer system with arbitration
5129090
July 7, 1992
Microprocessor hold and lock circuitry
5170481
December 8, 1992
Delayed cache write enable circuit for a dual bus microcomputer system with an 80386 and 82385
5175826
December 29, 1992
Data processing apparatus for selectively posting write cycles using the 82385 cache controller
5327545
July 5, 1994
Connecting a short word length non-volatile memory to a long word length address/data multiplexed bus
5448521
September 5, 1995
Microcomputer system employing address offset mechanism to increase the supported cache memory capacity
5450559
September 12, 1995
System and method for prefetching information in a processing system
5544342
August 6, 1996
Non-contiguous mapping of I/O addresses to use page protection of a process
5548746
August 20, 1996
Self-time processor with dynamic clock generator having plurality of tracking elements for outputting sequencing signals to functional units
5553276
September 3, 1996
Method and system for reading from a m-byte memory utilizing a processor having a n-byte data bus
5603041
February 11, 1997
Method and system in a distributed shared-memory data processing system for determining utilization of nodes by each executed thread
6266745
July 24, 2001
Method and system in a distributed shared-memory data processing system for determining utilization of shared-memory included within nodes by a designated application
6336170
January 1, 2002
Data storage device for recording to magnetic thread
7206163
April 17, 2007
Method and apparatus for constructing a neuroscience-inspired artificial neural network with visualization of neural pathways
9753959
September 5, 2017
Method and apparatus for constructing, using and reusing components and structures of an artificial neural network
10019470
July 10, 2018
Method and apparatus for providing random selection and long-term potentiation and depression in an artificial network
10055434
August 21, 2018
Method and apparatus for constructing a dynamic adaptive neural network array (DANNA)
10095718
October 9, 2018
Method and apparatus for providing real-time monitoring of an artificial neural network